The present invention relates to fabrication of integrated circuits, and more particularly to use of in-situ steam generation (ISSG) to form silicon oxide on regions containing silicon and/or silicon oxide and also containing nitrogen.
Nitrogen has been introduced into MOS transistors' gate dielectrics formed of silicon dioxide because nitrogen impedes boron and phosphorus diffusing between the transistor's gate and the channel and source/drain regions. See e.g. U.S. patent application published as No. 2001/0003381 on Jun. 14, 2001, filed by Orlowski et al., incorporated herein by reference. The nitrogen presence is not always desirable, however, because nitrogen can cause degradation of the transistor's performance (due to an increased oxide charge for example). U.S. Pat. No. 6,143,608, issued Nov. 7, 2000 to He et al. describes flash memory fabrication processes in which the gate oxide for the memory cell transistors is formed before the gate oxide for the peripheral transistors. The gate oxide for the memory cell transistors is nitrided, and the nitrogen contaminates the silicon substrate in the peripheral areas. When the peripheral areas are later oxidized to form the gate oxide for the peripheral transistors, the nitrogen slows down the oxidation process and also makes the peripheral gate oxide thickness unpredictable. In addition, the nitrogen undesirably reduces the peripheral transistors' breakdown voltages. The U.S. Pat. No. 6,143,608 therefore proposes to mask the peripheral areas with silicon nitride during the nitridation of the gate oxide of the memory cell transistors. Another solution is to etch away the nitrogen-contaminated silicon region in the periphery before growing the gate oxide for the peripheral transistors.